The present invention relates generally to bang-bang phase detectors. Bang-bang phase detectors are provided, together with multiphase generator apparatus incorporating such detectors.
A bang-bang phase detector compares the phase of two input signals and provides an output which distinguishes positive and negative phase differences between the input signals. In particular, the state (e.g. logic 0 or logic 1) of the detector output indicates whether the phase of one of the input signals leads, or lags behind, phase of the other. A transition in the detector output state thus indicates phase coincidence, or “phase lock”. Bang-bang phase detectors can be used, for example, in communication circuits such as I/O (Input/Output) link transceiver circuits of data processors and communications systems to set the phase of a reference clock signal used for data transmission/recovery.
A bang-bang phase detector typically comprises a set-reset (SR) latch followed by a data flip-flop (D flip-flop). The input signals to be phase-compared are supplied to the set and reset inputs of the SR latch. The latch detects the input phase relationship, providing a latch output signal whose state varies in dependence on the input signal phases. The latch output signal is supplied to the D flip-flop which latches a value indicative of the phase relationship at timings dependent on pulses at a clock input of the D flip-flop. The moment of D flip-flop output toggling indicates phase lock. The range of input signal phase differences over which the detector correctly indicates phase lock is limited by timing factors relating to the D flip-flop input signals. The D flip-flop output will correctly distinguish positive and negative phase differences for a range of phase differences around the phase locking point. With increasing phase difference, however, false phase locks can occur due to erroneous transitions in the D flip-flop output which are unrelated to phase coincidence of the input signals.
The above problem restricts the operative phase range of a bang-bang phase detector to the range over which false phase locking does not occur. The phase range over which such detectors operate reliably can also vary with frequency of the input signals. This causes particular difficulty in applications which demand operation over a wide range of input phase differences and/or frequencies. An example of such an application is the calibration of delay-line based multiphase generators in which a plurality of different signal phases are generated from a reference clock for signal sampling in high-speed receivers.